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PRELIMINARY
Z86116 CP95WRL0501
PRELIMINARY CUSTOMER PROCUREMENT SPECIFICATION
Z86116
CMOS Z8(R) PN MODULATOR WIRELESS CONTROLLER
FEATURES
ROM Part Z86116 (Kbytes) 1 RAM* (Kbytes) 124 SPEED (MHz)
s s
On-Chip PN Modulator for Spread Spectrum Communications 12 Input/Output Lines (One with Comparator Input) Vectored, Prioritized Interrupts With Programmable Polarity Analog Comparator Two Programmable 8-Bit Counter/Timers Each with Two 6-Bit Programmable Prescalers Watch-Dog Timer (WDT)/Power-On Reset (POR) On-Chip Oscillator that Accepts a RC, or External Clock Drive Low-Voltage Protection / Low-EMI Option
12
s
* General-Purpose
s s s s s
18-Pin DIP and SOIC Packages
s
3.0- to 5.5-Volt Operating Range
s
Low-Power Consumption 0 to +70C Temperature Range Expanded Register File (ERF)
s s
s
GENERAL DESCRIPTION
The Z86116 Wireless Controller is a member of the Z8(R) single-chip microcontroller family based on Zilog's 8-bit microcontroller core. The Z86116 is designed with specific features for wireless spread spectrum applications using direct sequence pseudo-noise (PN) modulation. Three address spaces, the Program Memory, Register File, and Expanded Register File (ERF), support a wide range of memory configurations. Through the ERF, the designer has access to three additional control registers that provide extra peripheral devices, I/O ports, and register addresses. For applications demanding powerful I/O capabilities, the Z86116's dedicated input and output lines are grouped into two ports, and are configurable under software control to provide timing, status signals, or parallel I/O.
Notes: All Signals with a preceding front slash, "/", are active Low, e.g., B//W (WORD is active Low); /B/W (BYTE is active Low, only). Power connections follow conventional descriptions below: Connection Power Ground Circuit VCC GND Device VDD VSS
CP95WRL0501
(8/95)
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PRELIMINARY
Z86116 CP95WRL0501
FUNCTIONAL DESCRIPTION
TM BASE
Output
Input
VCC
GND
RC
Time Base Generator
Port 3
Machine Timing & Instruction Control WDT POR , ALU
Counter/ Timers (2) Interrupt Control
FLAG
Prg. Memory 1024 x 8-Bit
Two Analog Comparators
Register Pointer Register File 144 x 8-Bit
Program Counter
PN Modulator
Port 2
I/O (Bit Programmable)
Functional Block Diagram
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PRELIMINARY
Z86116 CP95WRL0501
FUNCTIONAL DESCRIPTION (Continued)
18-Pin DIP/SOIC Pin Identification
P24 P25 P26 P27 VCC RC2 RC1 P31 P33
1 2 3 4 5 6 7 8 9
18 17 16 15 Z86116 14 13 12 11 10
P23 P22 P21 P20 GND P36 P35 GND TM BASE
No 1-4 5 6 7 8-9 10 11 12-13 14 15-18
Symbol P24-27 VCC RC2 RC1 P31, P33 TM BASE GND P35-36 GND P20-23
Function Port 2, Pins 4, 5, 6, 7 Power Supply RC Oscillator Clock RC Oscillator Clock Port 3, Pins 1, 3 Time Base Clock Ground Port 3, Pins 5, 6 Ground Port 2, Pins 0, 1, 2, 3
Direction In/Output Input Output Input Fixed Input Input Fixed Output In/Output
18-Pin DIP/SOIC Pin Configuration
3
PRELIMINARY
Z86116 CP95WRL0501
ABSOLUTE MAXIMUM RATINGS
Symbol VCC TSTG TA Description Supply Voltage* Storage Temp Oper Ambient Temp Min -0.3 -65 Max +7.0 +150 Units V C C Stresses greater than those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; operation of the device at any condition above those indicated in the operational sections of these specifications is not implied. Exposure to absolute maximum rating conditions for extended period may affect device reliability.
Notes: * Voltage on all pins with respect to GND. See Ordering Information
STANDARD TEST CONDITIONS
The characteristics listed below apply for standard test conditions as noted. All voltages are referenced to ground. Positive current flows into the referenced pin (Test Load Configuration).
From Output Under Test +5V
2.1 K
150 pF
9.1 K
Test Load Configuration
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PRELIMINARY
Z86116 CP95WRL0501
DC ELECTRICAL CHARACTERISTICS
TA = 0C to +70C Min Max 12 12 0.9 VCC 0.9 VCC VSS -0.3 VSS -0.3 0.7 VCC 0.7 VCC VSS -0.3 VSS -0.3 VCC -0.4 VCC -0.4 0.8 0.4 1.0 1.0 25 25 -1.0 -1.0 -1.0 -1.0 1.0 1.0 1.0 1.0 8.0 15 15 4.5 9.0 10 VCC +0.3 VCC +0.3 0.2 VCC 0.2 VCC VCC +0.3 VCC +0.3 0.2 VCC 0.2 VCC 2.4 3.9 1.6 2.7 1.8 2.8 1.0 1.5 3.1 4.8 0.2 0.1 0.4 0.5 10 10 Typical @ 25C
Sym
Parameter Max Input Voltage
VCC 3.0V 5.5V 3.0V 5.5V
Units V V V V V V V V V V V V V V V V mV mV A A A A mA mA A
Conditions IIN 250 A IIN 250 A Driven by External Clock Generator Driven by External Clock Generator Driven by External Clock Generator Driven by External Clock Generator
Notes
VCH
Clock Input High Voltage Clock Input Low Voltage Input High Voltage Input Low Voltage Output High Voltage Output Low Voltage Output Low Voltage
VCL
3.0V 5.5V
VIH VIL VOH VOL1 VOL2
3.0V 5.5V 3.0V 5.5V 3.0V 5.5V 3.0V 5.5V 3.0V 5.5V 3.0V 5.5V 3.0V 5.5V 3.0V 5.5V 3.0V 5.5V 4.5V
IOH = -2.0 mA IOH = -2.0 mA IOL = +4.0 mA IOL = +4.0 mA IOL = 6 mA, 3 Pin Max IOL = +12 mA, 3 Pin Max
VOFFSET Comparator Input Offset Voltage IIL Input Leakage (Input bias current of comparator) Output Leakage Supply Current
VIN = OV, VCC VIN = OV, VCC VIN = OV, VCC VIN = OV, VCC @ 12 MHz @ 12 MHz 10 kHz; External RC [2,3] [2,3] [2,5]
IOL ICC
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PRELIMINARY
Z86116 CP95WRL0501
DC ELECTRICAL CHARACTERISTICS (Continued)
TA = 0C to +70C Min Max 4.5 7.0 2.0 4.5 10 10 TBD TBD 12 7 3 1.50 24 13 2.65 200 5 13 7 2.1 Typical @ 25C 2.0 4.0 1.0 2.5 1.0 3.0
Sym Parameter ICC1 Standby Current (HALT Mode)
VCC 3.0V 5.5V 3.0V 5.5V
Units mA mA mA mA A A A A A ms ms V
Conditions HALT mode VIN = OV, VCC @ 12 MHz HALT mode VIN = OV, VCC @ 12 MHz Clock Divide-by-16 @ 12 MHz Clock Divide-by-16 @ 12 MHz
Notes [2,3] [2,3] [2 3] [2,3]
ICC2
Standby Current (STOP Mode)
3.0V 5.5V 3.0V 5.5V 5.5V
STOP mode VIN = OV, [4] VCC WDT is not Running STOP mode VIN = OV, [4] VCC WDT is not Running STOP mode VIN = OV, [4] VCC WDT is Running STOP mode VIN = OV, [4] VCC WDT is Running STOP Mode; TM BASE = 32.768 KHz; [6] WDT is not Running
TPOR VBO
Power-On Reset VCC Low Voltage Protection Voltage
3.0V 5.5V
2 MHz max Ext. CLK Freq.
[1]
Notes [1] VLV increases as the temperature decreases. [2] All outputs unloaded, I/O pins floating, inputs at either rail, TM BASE clock input grounded. [3] CL1 = CL2 = 100 pF. [4] Same as note [2] except inputs at VCC. [5] Low EMI oscillator selected; SCLK = RC/2 RC selected for WDT; 10 kHz RC Oscillator (corresponding to R 1.2 M, C 68 pF). [6] Z8 in STOP mode; WDT off; TM BASE selected as Z8 system clock source Time base counter enabled; VCC = 5.5V.
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PRELIMINARY
Z86116 CP95WRL0501
AC ELECTRICAL CHARACTERISTICS
1 3
Clock
2 7 7 2 3
TIN
4 6 5
IRQN
8 9
Clock Setup
11
Stop-Mode Recovery Source
10
7
PRELIMINARY
Z86116 CP95WRL0501
AC ELECTRICAL CHARACTERISTICS (Continued)
TA = 0C to +70C 12 MHz Min Max 83 83 100,000 100,000 15 15 26 26 100 70 3TpC 3TpC 8TpC 8TpC 100 100 100 70 3TpC 3TpC 12 12 5TpC 5TpC 15 5 30 16 60 25 250 120 ms ms ms ms ms ms ms ns ns Reg.[4] ns [5] D0 = 0 [6, D1 = 0 [6] D0 = 1 [6] D1 = 0 [6] D0 = 0 [6] D1 = 1 [6] D0 = 1 [6] D1 = 1 [6] ns ns ns ns
No 1 2 3 4 5 6 7
Sym TpC TrC,TfC TwC TwTinL TwTinH TpTin TrTin, TtTin TwIL
Parameter Input Clock Period Clock Input Rise and Fall Times Input Clock Width Timer Input Low Width Timer Input High Width Timer Input Period Timer Input Rise and Fall Timer Int. Request Input Low Time Int. Request Input High Time Stop-Mode Recovery Width Spec Oscillator Startup Time Watch-Dog Timer Refresh Time
VCC Note [3] 3.3V 5.0V 3.3V 5.0V 3.3V 5.0V 3.3V 5.0V 3.3V 5.0V 3.3V 5.0V 3.3V 5.0V
Units ns ns ns ns ns ns ns ns
Notes [1] [1] [1] [1] [1] [1] [1] [1] [1] [1] [1] [1] [1] [1] [1,2] [1,2] [1,2] [1,2]
8
3.3V 5.0V
9
TwIH
3.3V 5.0V
10
Twsm
3.3V 5.0V
11
Tost Twdt
3.3V 5.0V 3.3V 5.0V 3.3V 5.0V 3.3V 5.0V 3.3V 5.0V
Notes: [1] Timing Reference uses 0.9 VCC for a logic 1 and 0.1 VCC for a logic 0. [2] Interrupt request through Port 3 (P33-P31). [3] 5.0V 0.5V, 3.3V 0.3V. [4] SMR-D5 = 0. [5] Reg. WDTMR. [6] WDT Oscillator only.
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PRELIMINARY
Z86116 CP95WRL0501
Pre-Characterization Product: The product represented by this CPS is newly introduced and Zilog has not completed the full characterization of the product. The CPS states what Zilog knows about this product at this time, but additional features or non-con-
formance with some aspects of the CPS may be found, either by Zilog or its customers in the course of further application and characterization work. In addition, Zilog cautions that delivery may be uncertain at times, due to start-up yield issues.
Zilog's products are not authorized for use as critical components in life support devices or systems unless a specific written agreement pertaining to such intended use is executed between the customer and Zilog prior to use. Life support devices or systems are those which are intended for surgical implantation into the body, or which sustains life whose failure to perform, when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. Zilog, Inc. 210 East Hacienda Ave. Campbell, CA 95008-6600 Telephone (408) 370-8000 Telex 910-338-7621 FAX 408 370-8056 Internet: http://www.zilog.com
(c) 1995 by Zilog, Inc. All rights reserved. No part of this document may be copied or reproduced in any form or by any means without the prior written consent of Zilog, Inc. The information in this document is subject to change without notice. Devices sold by Zilog, Inc. are covered by warranty and patent indemnification provisions appearing in Zilog, Inc. Terms and Conditions of Sale only. Zilog, Inc. makes no warranty, express, statutory, implied or by description, regarding the information set forth herein or regarding the freedom of the described devices from intellectual property infringement. Zilog, Inc. makes no warranty of merchantability or fitness for any purpose. Zilog, Inc. shall not be responsible for any errors that may appear in this document. Zilog, Inc. makes no commitment to update or keep current the information contained in this document.
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